aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/mach-common
diff options
context:
space:
mode:
authorPhilippe Gerum <rpm@xenomai.org>2011-03-17 02:12:48 -0400
committerMike Frysinger <vapier@gentoo.org>2011-03-18 04:01:10 -0400
commit5b5da4c4b843e0d84244472b72fe1e7500f5681f (patch)
treeb15424c4909ca7b4f69f28bd8576ba065e9030fa /arch/blackfin/mach-common
parentBlackfin: cpufreq: fix typos (diff)
downloadlinux-dev-5b5da4c4b843e0d84244472b72fe1e7500f5681f.tar.xz
linux-dev-5b5da4c4b843e0d84244472b72fe1e7500f5681f.zip
Blackfin/ipipe: upgrade to I-pipe mainline
This patch introduces Blackfin-specific bits to support the current tip of the interrupt pipeline development, mainly: - 2/3-level interrupt maps (sparse IRQs) - generic virq handling - sysinfo v2 format for ipipe_get_sysinfo() Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to '')
-rw-r--r--arch/blackfin/mach-common/ints-priority.c41
1 files changed, 37 insertions, 4 deletions
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 8e9d3cc30885..6cd52395a999 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -15,6 +15,7 @@
#include <linux/kernel_stat.h>
#include <linux/seq_file.h>
#include <linux/irq.h>
+#include <linux/sched.h>
#ifdef CONFIG_IPIPE
#include <linux/ipipe.h>
#endif
@@ -556,10 +557,9 @@ static void bfin_demux_mac_status_irq(unsigned int int_err_irq,
static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle)
{
#ifdef CONFIG_IPIPE
- _set_irq_handler(irq, handle_level_irq);
-#else
- __set_irq_handler_unlocked(irq, handle);
+ handle = handle_level_irq;
#endif
+ __set_irq_handler_unlocked(irq, handle);
}
static DECLARE_BITMAP(gpio_enabled, MAX_BLACKFIN_GPIOS);
@@ -1392,7 +1392,7 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
struct ipipe_domain *this_domain = __ipipe_current_domain;
struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop;
struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst;
- int irq, s;
+ int irq, s = 0;
if (likely(vec == EVT_IVTMR_P))
irq = IRQ_CORETMR;
@@ -1442,6 +1442,21 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
__raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10;
}
+ /*
+ * We don't want Linux interrupt handlers to run at the
+ * current core priority level (i.e. < EVT15), since this
+ * might delay other interrupts handled by a high priority
+ * domain. Here is what we do instead:
+ *
+ * - we raise the SYNCDEFER bit to prevent
+ * __ipipe_handle_irq() to sync the pipeline for the root
+ * stage for the incoming interrupt. Upon return, that IRQ is
+ * pending in the interrupt log.
+ *
+ * - we raise the TIF_IRQ_SYNC bit for the current thread, so
+ * that _schedule_and_signal_from_int will eventually sync the
+ * pipeline from EVT15.
+ */
if (this_domain == ipipe_root_domain) {
s = __test_and_set_bit(IPIPE_SYNCDEFER_FLAG, &p->status);
barrier();
@@ -1451,6 +1466,24 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
__ipipe_handle_irq(irq, regs);
ipipe_trace_irq_exit(irq);
+ if (user_mode(regs) &&
+ !ipipe_test_foreign_stack() &&
+ (current->ipipe_flags & PF_EVTRET) != 0) {
+ /*
+ * Testing for user_regs() does NOT fully eliminate
+ * foreign stack contexts, because of the forged
+ * interrupt returns we do through
+ * __ipipe_call_irqtail. In that case, we might have
+ * preempted a foreign stack context in a high
+ * priority domain, with a single interrupt level now
+ * pending after the irqtail unwinding is done. In
+ * which case user_mode() is now true, and the event
+ * gets dispatched spuriously.
+ */
+ current->ipipe_flags &= ~PF_EVTRET;
+ __ipipe_dispatch_event(IPIPE_EVENT_RETURN, regs);
+ }
+
if (this_domain == ipipe_root_domain) {
set_thread_flag(TIF_IRQ_SYNC);
if (!s) {