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authorGreg Ungerer <gerg@uclinux.org>2011-03-06 23:01:46 +1000
committerGreg Ungerer <gerg@uclinux.org>2011-03-15 21:01:55 +1000
commit6a92e1982d5c538d1cfafbe4b0cb16d49306854f (patch)
tree700847577d3cd3385125fe46822e8759a76607da /arch/m68knommu
parentm68knommu: remove use of MBAR in old-style ColdFire timer (diff)
downloadlinux-dev-6a92e1982d5c538d1cfafbe4b0cb16d49306854f.tar.xz
linux-dev-6a92e1982d5c538d1cfafbe4b0cb16d49306854f.zip
m68knommu: clean up use of MBAR for DRAM registers on ColdFire start
In some of the RAM size autodetection code on ColdFire CPU startup we reference DRAM registers relative to the MBAR register. Not all of the supported ColdFire CPUs have an MBAR, and currently this works because we fake an MBAR address on those registers. In an effort to clean this up, and eventually remove the fake MBAR setting make the DRAM register address definitions actually contain the MBAR (or IPSBAR as appropriate) value as required. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68knommu')
-rw-r--r--arch/m68knommu/platform/coldfire/head.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/m68knommu/platform/coldfire/head.S b/arch/m68knommu/platform/coldfire/head.S
index 7967e8ab9fae..129bff4956b5 100644
--- a/arch/m68knommu/platform/coldfire/head.S
+++ b/arch/m68knommu/platform/coldfire/head.S
@@ -41,17 +41,17 @@
* DRAM controller is quite different.
*/
.macro GET_MEM_SIZE
- movel MCF_MBAR+MCFSIM_DMR0,%d0 /* get mask for 1st bank */
+ movel MCFSIM_DMR0,%d0 /* get mask for 1st bank */
btst #0,%d0 /* check if region enabled */
beq 1f
andl #0xfffc0000,%d0
beq 1f
addl #0x00040000,%d0 /* convert mask to size */
1:
- movel MCF_MBAR+MCFSIM_DMR1,%d1 /* get mask for 2nd bank */
+ movel MCFSIM_DMR1,%d1 /* get mask for 2nd bank */
btst #0,%d1 /* check if region enabled */
beq 2f
- andl #0xfffc0000, %d1
+ andl #0xfffc0000,%d1
beq 2f
addl #0x00040000,%d1
addl %d1,%d0 /* total mem size in d0 */