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| author |   John Williams <john.williams@petalogix.com> | 2009-08-24 13:52:32 +1000 |
|---|---|---|
| committer |   Michal Simek <monstr@monstr.eu> | 2009-12-14 08:45:00 +0100 |
| commit | 3e78e4e5eaf6a85b8cdcc880bb46c1e4b4b79cc2 (patch) | |
| tree | 213361bbc1c061969dce5b80735a3b74fb77536a /arch/microblaze/platform/generic/Kconfig.auto | |
| parent | microblaze: Move cache macro from cache.h to cacheflush.h (diff) | |
| download | linux-dev-3e78e4e5eaf6a85b8cdcc880bb46c1e4b4b79cc2.tar.xz linux-dev-3e78e4e5eaf6a85b8cdcc880bb46c1e4b4b79cc2.zip | |
microblaze: Remove the buggy ALLOW_EDIT_AUTO config option
This was intended to allow manual override of CPU settings copied automatically
to Kconfig.auto, however it's problematic for several reasons, but mostly:
* If the defconfig doesn't have ALLOW_EDIT_AUTO=y, then it's impossible for
that defconfig to iverride the values in the kernel source tree. This leads
to very strange errors where the kernel is compiled with the wrong CPUFLAGS.
Next patch in the series will back out the default in Kconfig.auto to baseline
settings, so a kernel built with no default values will at least boot on any
hardware, just not make use of additional CPU features.
Signed-off-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to '')
| -rw-r--r-- | arch/microblaze/platform/generic/Kconfig.auto | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/arch/microblaze/platform/generic/Kconfig.auto b/arch/microblaze/platform/generic/Kconfig.auto index fbca22d9c8b9..1eaa49ea8f2d 100644 --- a/arch/microblaze/platform/generic/Kconfig.auto +++ b/arch/microblaze/platform/generic/Kconfig.auto @@ -21,7 +21,6 @@ # Definitions for MICROBLAZE0 comment "Definitions for MICROBLAZE0" - depends on ALLOW_EDIT_AUTO config KERNEL_BASE_ADDR hex "Physical address where Linux Kernel is" @@ -30,33 +29,33 @@ config KERNEL_BASE_ADDR BASE Address for kernel config XILINX_MICROBLAZE0_FAMILY - string "Targetted FPGA family" if ALLOW_EDIT_AUTO + string "Targetted FPGA family" default "virtex5" config XILINX_MICROBLAZE0_USE_MSR_INSTR - int "USE_MSR_INSTR range (0:1)" if ALLOW_EDIT_AUTO + int "USE_MSR_INSTR range (0:1)" default 1 config XILINX_MICROBLAZE0_USE_PCMP_INSTR - int "USE_PCMP_INSTR range (0:1)" if ALLOW_EDIT_AUTO + int "USE_PCMP_INSTR range (0:1)" default 1 config XILINX_MICROBLAZE0_USE_BARREL - int "USE_BARREL range (0:1)" if ALLOW_EDIT_AUTO + int "USE_BARREL range (0:1)" default 1 config XILINX_MICROBLAZE0_USE_DIV - int "USE_DIV range (0:1)" if ALLOW_EDIT_AUTO + int "USE_DIV range (0:1)" default 1 config XILINX_MICROBLAZE0_USE_HW_MUL - int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)" if ALLOW_EDIT_AUTO + int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)" default 2 config XILINX_MICROBLAZE0_USE_FPU - int "USE_FPU values (0=NONE, 1=BASIC, 2=EXTENDED)" if ALLOW_EDIT_AUTO + int "USE_FPU values (0=NONE, 1=BASIC, 2=EXTENDED)" default 2 config XILINX_MICROBLAZE0_HW_VER - string "Core version number" if ALLOW_EDIT_AUTO + string "Core version number" default 7.10.d |