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authorThomas Bogendoerfer <tbogendoerfer@suse.de>2019-02-19 16:57:20 +0100
committerPaul Burton <paul.burton@mips.com>2019-02-19 12:46:03 -0800
commit69a07a41d908f9df48393bbab179daded8cfab66 (patch)
tree6764897f28cee05ecd539010ce61c4138b3bfdc5 /arch/mips/include/asm/mach-ip27/irq.h
parentMIPS: SGI-IP27: do boot CPU init later (diff)
downloadlinux-dev-69a07a41d908f9df48393bbab179daded8cfab66.tar.xz
linux-dev-69a07a41d908f9df48393bbab179daded8cfab66.zip
MIPS: SGI-IP27: rework HUB interrupts
This commit rearranges the HUB interrupt code by using MIPS_IRQ_CPU interrupt handling code and modern Linux IRQ framework features to get rid of global arrays. It also adds support for irq affinity setting. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch/mips/include/asm/mach-ip27/irq.h')
-rw-r--r--arch/mips/include/asm/mach-ip27/irq.h12
1 files changed, 7 insertions, 5 deletions
diff --git a/arch/mips/include/asm/mach-ip27/irq.h b/arch/mips/include/asm/mach-ip27/irq.h
index b0b7261ff3ad..fd91c58aaf7d 100644
--- a/arch/mips/include/asm/mach-ip27/irq.h
+++ b/arch/mips/include/asm/mach-ip27/irq.h
@@ -10,13 +10,15 @@
#ifndef __ASM_MACH_IP27_IRQ_H
#define __ASM_MACH_IP27_IRQ_H
-/*
- * A hardwired interrupt number is completely stupid for this system - a
- * large configuration might have thousands if not tenthousands of
- * interrupts.
- */
#define NR_IRQS 256
#include_next <irq.h>
+#define IP27_HUB_PEND0_IRQ (MIPS_CPU_IRQ_BASE + 2)
+#define IP27_HUB_PEND1_IRQ (MIPS_CPU_IRQ_BASE + 3)
+#define IP27_RT_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 4)
+
+#define IP27_HUB_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8)
+#define IP27_HUB_IRQ_COUNT 128
+
#endif /* __ASM_MACH_IP27_IRQ_H */