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| author |   Ralf Baechle <ralf@linux-mips.org> | 2007-07-10 17:33:02 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-07-10 17:33:02 +0100 |
| commit | a36920200c5b89d56120a5e839fe4a603d51b16c (patch) | |
| tree | aefb1fc4b0792ef788024fa596954a5689f15d0a /arch/mips/kernel/traps.c | |
| parent | [MIPS] FP affinity: Coding style cleanups (diff) | |
| download | linux-dev-a36920200c5b89d56120a5e839fe4a603d51b16c.tar.xz linux-dev-a36920200c5b89d56120a5e839fe4a603d51b16c.zip | |
[MIPS] Enable support for the userlocal hardware register
Which will cut down the cost of RDHWR $29 which is used to obtain the
TLS pointer and so far being emulated in software down to a single cycle
operation.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to '')
| -rw-r--r-- | arch/mips/kernel/traps.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index c598e890a880..9b19a84d11ef 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1341,7 +1341,14 @@ void __init per_cpu_trap_init(void) set_c0_status(ST0_MX); #ifdef CONFIG_CPU_MIPSR2 - write_c0_hwrena (0x0000000f); /* Allow rdhwr to all registers */ + if (cpu_has_mips_r2) { + unsigned int enable = 0x0000000f; + + if (cpu_has_userlocal) + enable |= (1 << 29); + + write_c0_hwrena(enable); + } #endif #ifdef CONFIG_MIPS_MT_SMTC |