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authorNicholas Piggin <npiggin@gmail.com>2018-11-07 10:35:34 +0800
committerLey Foon Tan <ley.foon.tan@intel.com>2019-03-07 05:29:35 +0800
commit3ac23944de570df7a6309425aeef063be38f37c4 (patch)
tree7c5a3a2fd805045dfbd4eaa507d25dbc89d9cd1c /arch/nios2/include/asm
parentnios2: User address TLB flush break after finding the matching entry (diff)
downloadlinux-dev-3ac23944de570df7a6309425aeef063be38f37c4.tar.xz
linux-dev-3ac23944de570df7a6309425aeef063be38f37c4.zip
nios2: update_mmu_cache preload the TLB with the new PTE
Rather than flush the TLB entry when installing a new PTE to allow the fast TLB reload to re-fill the TLB, just refill the TLB entry when removing the old one. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/nios2/include/asm')
-rw-r--r--arch/nios2/include/asm/tlbflush.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/nios2/include/asm/tlbflush.h b/arch/nios2/include/asm/tlbflush.h
index 982a7ecf221f..b4bf487b9832 100644
--- a/arch/nios2/include/asm/tlbflush.h
+++ b/arch/nios2/include/asm/tlbflush.h
@@ -30,6 +30,9 @@ struct mm_struct;
* - flush_tlb_page(vma, address) flushes a page
* - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
* - flush_tlb_kernel_page(address) flushes a kernel page
+ *
+ * - reload_tlb_page(vma, address, pte) flushes the TLB for address like
+ * flush_tlb_page, then replaces it with a TLB for pte.
*/
extern void flush_tlb_all(void);
extern void flush_tlb_mm(struct mm_struct *mm);
@@ -48,4 +51,7 @@ static inline void flush_tlb_kernel_page(unsigned long address)
flush_tlb_kernel_range(address, address + PAGE_SIZE);
}
+extern void reload_tlb_page(struct vm_area_struct *vma, unsigned long addr,
+ pte_t pte);
+
#endif /* _ASM_NIOS2_TLBFLUSH_H */