path: root/arch/nios2/include/asm
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authorChristoph Hellwig <hch@lst.de>2017-08-27 10:37:15 +0200
committerChristoph Hellwig <hch@lst.de>2017-10-19 16:37:49 +0200
commitc9eb6172c328dde7e14812f94f8da87b691e41b5 (patch)
tree5b27a749da30670bd6141f3f3b0ddb67d48e4520 /arch/nios2/include/asm
parentsh: make dma_cache_sync a no-op (diff)
dma-mapping: turn dma_cache_sync into a dma_map_ops method
After we removed all the dead wood it turns out only two architectures actually implement dma_cache_sync as a real op: mips and parisc. Add a cache_sync method to struct dma_map_ops and implement it for the mips defualt DMA ops, and the parisc pa11 ops. Note that arm, arc and openrisc support DMA_ATTR_NON_CONSISTENT, but never provided a functional dma_cache_sync implementations, which seems somewhat odd. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Diffstat (limited to 'arch/nios2/include/asm')
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/nios2/include/asm/dma-mapping.h b/arch/nios2/include/asm/dma-mapping.h
index f8dc62222741..6ceb92251da0 100644
--- a/arch/nios2/include/asm/dma-mapping.h
+++ b/arch/nios2/include/asm/dma-mapping.h
@@ -17,13 +17,4 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
return &nios2_dma_ops;
- * dma_alloc_attrs() always returns non-cacheable memory, so there's no need to
- * do any flushing here.
- */
-static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
- enum dma_data_direction direction)
#endif /* _ASM_NIOS2_DMA_MAPPING_H */