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| author |   Guenter Roeck <linux@roeck-us.net> | 2016-09-24 07:15:02 -0700 |
|---|---|---|
| committer | Guenter Roeck <linux@roeck-us.net> | 2016-11-06 08:01:12 -0800 |
| commit | 2c7a5c5c48d97ce3105f3258a259f67b7b9d7eb1 (patch) | |
| tree | cd251088e523d0e31e6f6b677f44451699d1038d /arch/openrisc/include/asm/cache.h | |
| parent | Linux 4.9-rc4 (diff) | |
| download | linux-dev-2c7a5c5c48d97ce3105f3258a259f67b7b9d7eb1.tar.xz linux-dev-2c7a5c5c48d97ce3105f3258a259f67b7b9d7eb1.zip | |
openrisc: Define __ro_after_init to avoid crash
openrisc qemu tests fail with the following crash.
Unable to handle kernel access at virtual address 0xc0300c34
Oops#: 0001
CPU #: 0
PC: c016c710 SR: 0000ae67 SP: c1017e04
GPR00: 00000000 GPR01: c1017e04 GPR02: c0300c34 GPR03: c0300c34
GPR04: 00000000 GPR05: c0300cb0 GPR06: c0300c34 GPR07: 000000ff
GPR08: c107f074 GPR09: c0199ef4 GPR10: c1016000 GPR11: 00000000
GPR12: 00000000 GPR13: c107f044 GPR14: c0473774 GPR15: 07ce0000
GPR16: 00000000 GPR17: c107ed8a GPR18: 00009600 GPR19: c107f044
GPR20: c107ee74 GPR21: 00000003 GPR22: c0473770 GPR23: 00000033
GPR24: 000000bf GPR25: 00000019 GPR26: c046400c GPR27: 00000001
GPR28: c0464028 GPR29: c1018000 GPR30: 00000006 GPR31: ccf37483
RES: 00000000 oGPR11: ffffffff
Process swapper (pid: 1, stackpage=c1001960)
Stack: Stack dump [0xc1017cf8]:
sp + 00: 0xc1017e04
sp + 04: 0xc0300c34
sp + 08: 0xc0300c34
sp + 12: 0x00000000
...
Bisect points to commit d2ec3f77de8e ("pty: make ptmx file ops read-only
after init"). Fix by defining __ro_after_init for the openrisc
architecture, similar to parisc.
Fixes: d2ec3f77de8e ("pty: make ptmx file ops read-only after init")
Cc: Kees Cook <keescook@chromium.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/openrisc/include/asm/cache.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/openrisc/include/asm/cache.h b/arch/openrisc/include/asm/cache.h index 4ce7a01a252d..5f55da9cbfd5 100644 --- a/arch/openrisc/include/asm/cache.h +++ b/arch/openrisc/include/asm/cache.h @@ -23,6 +23,8 @@ * they shouldn't be hard-coded! */ +#define __ro_after_init __read_mostly + #define L1_CACHE_BYTES 16 #define L1_CACHE_SHIFT 4 |