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| author |   Jeremy Kerr <jk@ozlabs.org> | 2017-09-27 12:55:51 +0800 |
|---|---|---|
| committer |   Michael Ellerman <mpe@ellerman.id.au> | 2017-10-03 16:16:55 +1100 |
| commit | 3b7af5c0fd9631762d1c4d7b4cee76f571dd3c2c (patch) | |
| tree | 8ca48a102f0bef6b4e2e5f1ffa9eb326f76a19ef /arch/powerpc/kernel/dt_cpu_ftrs.c | |
| parent | cxl: Fix memory page not handled (diff) | |
| download | linux-dev-3b7af5c0fd9631762d1c4d7b4cee76f571dd3c2c.tar.xz linux-dev-3b7af5c0fd9631762d1c4d7b4cee76f571dd3c2c.zip | |
powerpc: Fix action argument for cpufeatures-based TLB flush
Commit 41d0c2ecde19 ("powerpc/powernv: Fix local TLB flush for boot
and MCE on POWER9") introduced calls to __flush_tlb_power[89] from the
cpufeatures code, specifying the number of sets to flush.
However, these functions take an action argument, not a number of
sets. This means we hit the BUG() in __flush_tlb_{206,300} when using
cpufeatures-style configuration.
This change passes TLB_INVAL_SCOPE_GLOBAL instead.
Fixes: 41d0c2ecde19 ("powerpc/powernv: Fix local TLB flush for boot and MCE on POWER9")
Cc: stable@vger.kernel.org # v4.13+
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to '')
| -rw-r--r-- | arch/powerpc/kernel/dt_cpu_ftrs.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c index 1df770e8cbe0..7275fed271af 100644 --- a/arch/powerpc/kernel/dt_cpu_ftrs.c +++ b/arch/powerpc/kernel/dt_cpu_ftrs.c @@ -102,10 +102,10 @@ static void cpufeatures_flush_tlb(void) case PVR_POWER8: case PVR_POWER8E: case PVR_POWER8NVL: - __flush_tlb_power8(POWER8_TLB_SETS); + __flush_tlb_power8(TLB_INVAL_SCOPE_GLOBAL); break; case PVR_POWER9: - __flush_tlb_power9(POWER9_TLB_SETS_HASH); + __flush_tlb_power9(TLB_INVAL_SCOPE_GLOBAL); break; default: pr_err("unknown CPU version for boot TLB flush\n"); |