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authorRoland Dreier <rolandd@cisco.com>2005-11-07 00:58:12 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2005-11-07 07:53:26 -0800
commit41aace4fe81e3da52fa80b8380e5d2d084f77691 (patch)
treed98b965682efa0e940d9564eafdd8eb69e616ffe /arch/ppc/platforms/4xx/Makefile
parent[PATCH] ppc32: Allow ERPN for early serial to depend on CPU type (diff)
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[PATCH] ppc32: Dump error status for both PLB segments on 440SP
The PowerPC 440SP SoC has two Processor Local Bus (PLB) segments (a high-throughput segment and a low-latency segment). Fix our PLB register definitions to cope with this, and add code to dump the status of both segments when a machine check occurs. Signed-off-by: Roland Dreier <rolandd@cisco.com> Cc: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/platforms/4xx/Makefile')
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