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authorSimon Arlott <simon@fire.lp0.eu>2007-05-12 05:42:54 +1000
committerPaul Mackerras <paulus@samba.org>2007-05-12 11:32:49 +1000
commita8de5ce9895367191df9b30804a0c67cfcc9f27a (patch)
tree8f99af81affca30d868bd9ee7c043639b905c4f8 /arch/ppc/syslib/hawk_common.c
parent[POWERPC] U-boot passes the initrd as start/end, not start/size. (diff)
downloadlinux-dev-a8de5ce9895367191df9b30804a0c67cfcc9f27a.tar.xz
linux-dev-a8de5ce9895367191df9b30804a0c67cfcc9f27a.zip
[POWERPC] Spelling fixes: arch/ppc/
Spelling fixes in arch/ppc/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to '')
-rw-r--r--arch/ppc/syslib/hawk_common.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/ppc/syslib/hawk_common.c b/arch/ppc/syslib/hawk_common.c
index c5bf16b0d6a1..86821d8753ed 100644
--- a/arch/ppc/syslib/hawk_common.c
+++ b/arch/ppc/syslib/hawk_common.c
@@ -165,7 +165,7 @@ hawk_init(struct pci_controller *hose,
processor_pci_mem_start +
hose->mem_space.start) | 0x0);
- /* Map MPIC into vitual memory */
+ /* Map MPIC into virtual memory */
OpenPIC_Addr = ioremap(processor_mpic_base, HAWK_MPIC_SIZE);
return 0;
@@ -176,7 +176,7 @@ hawk_init(struct pci_controller *hose,
* This assumes that PPCBug has initialized the memory controller (SMC)
* on the Falcon/HAWK correctly (i.e., it does no sanity checking).
* It also assumes that the memory base registers are set to configure the
- * memory as contigous starting with "RAM A BASE", "RAM B BASE", etc.
+ * memory as contiguous starting with "RAM A BASE", "RAM B BASE", etc.
* however, RAM base registers can be skipped (e.g. A, B, C are set,
* D is skipped but E is set is okay).
*/