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| author |   Paul Mundt <lethal@linux-sh.org> | 2010-02-17 13:23:00 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2010-02-17 13:23:00 +0900 |
| commit | 7bdda6209f224aa784a036df54b22cb338d2e859 (patch) | |
| tree | 2c2ce99f0ec55386246379ffb8412b3a893402b0 /arch/sh/include/cpu-sh4/cpu/sq.h | |
| parent | sh: Setup boot CPU VBR early to enable early page faults. (diff) | |
| download | linux-dev-7bdda6209f224aa784a036df54b22cb338d2e859.tar.xz linux-dev-7bdda6209f224aa784a036df54b22cb338d2e859.zip | |
sh: Fix up more 64-bit pgprot truncation on SH-X2 TLB.
Both the store queue API and the PMB remapping take unsigned long for
their pgprot flags, which cuts off the extended protection bits. In the
case of the PMB this isn't really a problem since the cache attribute
bits that we care about are all in the lower 32-bits, but we do it just
to be safe. The store queue remapping on the other hand depends on the
extended prot bits for enabling userspace access to the mappings.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/cpu-sh4/cpu/sq.h')
| -rw-r--r-- | arch/sh/include/cpu-sh4/cpu/sq.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/sq.h b/arch/sh/include/cpu-sh4/cpu/sq.h index 586d6491816a..74716ba2dc3c 100644 --- a/arch/sh/include/cpu-sh4/cpu/sq.h +++ b/arch/sh/include/cpu-sh4/cpu/sq.h @@ -12,6 +12,7 @@ #define __ASM_CPU_SH4_SQ_H #include <asm/addrspace.h> +#include <asm/page.h> /* * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be @@ -28,7 +29,7 @@ /* arch/sh/kernel/cpu/sh4/sq.c */ unsigned long sq_remap(unsigned long phys, unsigned int size, - const char *name, unsigned long flags); + const char *name, pgprot_t prot); void sq_unmap(unsigned long vaddr); void sq_flush_range(unsigned long start, unsigned int len); |