path: root/arch/v850/README
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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/v850/README
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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+This port to the NEC V850E processor supports the following platforms:
+ + The gdb v850e simulator (CONFIG_V850E_SIM).
+ + The Midas labs RTE-V850E/MA1-CB and RTE-V850E/NB85E-CB evaluation boards
+ (CONFIG_RTE_CB_MA1 and CONFIG_RTE_CB_NB85E). This support has only been
+ tested when running with the Multi-debugger monitor ROM (for the Green
+ Hills Multi debugger). The optional NEC Solution Gear RTE-MOTHER-A
+ motherboard is also supported, which allows PCI boards to be used
+ + The Midas labs RTE-V850E/ME2-CB evaluation board (CONFIG_RTE_CB_ME2).
+ This has only been tested using a kernel downloaded via an ICE connection
+ using the Multi debugger. Support for the RTE-MOTHER-A is present, but
+ hasn't been tested (unlike the other Midas labs cpu boards, the
+ RTE-V850E/ME2-CB includes an ethernet adaptor).
+ + The NEC AS85EP1 V850E evaluation chip/board (CONFIG_V850E_AS85EP1).
+ + The NEC `Anna' (board/chip) implementation of the V850E2 processor
+ + The sim85e2c and sim85e2s simulators, which are verilog simulations of
+ the V850E2 NA85E2C/NA85E2S cpu cores (CONFIG_V850E2_SIM85E2C and
+ CONFIG_V850E2_SIM85E2S).
+ + A FPGA implementation of the V850E2 NA85E2C cpu core
+ (CONFIG_V850E2_FPGA85E2C).
+Porting to anything with a V850E/MA1 or MA2 processor should be simple.
+See the file <asm-v850/machdep.h> and the files it includes for an example of
+how to add platform/chip-specific support.