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| author |   Luwei Kang <luwei.kang@intel.com> | 2018-10-24 16:05:16 +0800 |
|---|---|---|
| committer |   Paolo Bonzini <pbonzini@redhat.com> | 2018-12-21 11:28:38 +0100 |
| commit | ee85dec2fe9c860c40f6e2e1d53052b80f36cd58 (patch) | |
| tree | 258f4fa0826c514cd48574ae5325455fd81695db /arch/x86/kvm/vmx/vmx.c | |
| parent | KVM: x86: Set intercept for Intel PT MSRs read/write (diff) | |
| download | linux-dev-ee85dec2fe9c860c40f6e2e1d53052b80f36cd58.tar.xz linux-dev-ee85dec2fe9c860c40f6e2e1d53052b80f36cd58.zip | |
KVM: x86: Disable Intel PT when VMXON in L1 guest
Currently, Intel Processor Trace do not support tracing in L1 guest
VMX operation(IA32_VMX_MISC[bit 14] is 0). As mentioned in SDM,
on these type of processors, execution of the VMXON instruction will
clears IA32_RTIT_CTL.TraceEn and any attempt to write IA32_RTIT_CTL
causes a general-protection exception (#GP).
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/x86/kvm/vmx/vmx.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 338c65091241..3ef444de0c5e 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1926,7 +1926,8 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) break; case MSR_IA32_RTIT_CTL: if ((pt_mode != PT_MODE_HOST_GUEST) || - vmx_rtit_ctl_check(vcpu, data)) + vmx_rtit_ctl_check(vcpu, data) || + vmx->nested.vmxon) return 1; vmcs_write64(GUEST_IA32_RTIT_CTL, data); vmx->pt_desc.guest.ctl = data; |