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authorChao Peng <chao.p.peng@linux.intel.com>2018-10-24 16:05:15 +0800
committerPaolo Bonzini <pbonzini@redhat.com>2018-12-21 11:28:37 +0100
commitb08c28960f254bd246af8e30a468dfc7dd56e03b (patch)
tree07ded28e09d131d36afc941e23fc422777f24bf2 /arch/x86/kvm/vmx/vmx.h
parentKVM: x86: Implement Intel PT MSRs read/write emulation (diff)
downloadlinux-dev-b08c28960f254bd246af8e30a468dfc7dd56e03b.tar.xz
linux-dev-b08c28960f254bd246af8e30a468dfc7dd56e03b.zip
KVM: x86: Set intercept for Intel PT MSRs read/write
To save performance overhead, disable intercept Intel PT MSRs read/write when Intel PT is enabled in guest. MSR_IA32_RTIT_CTL is an exception that will always be intercepted. Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com> Signed-off-by: Luwei Kang <luwei.kang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to '')
-rw-r--r--arch/x86/kvm/vmx/vmx.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
index dd3b9ab90556..20172c11d5f8 100644
--- a/arch/x86/kvm/vmx/vmx.h
+++ b/arch/x86/kvm/vmx/vmx.h
@@ -316,6 +316,7 @@ bool vmx_get_nmi_mask(struct kvm_vcpu *vcpu);
void vmx_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked);
void vmx_set_virtual_apic_mode(struct kvm_vcpu *vcpu);
struct shared_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr);
+void pt_update_intercept_for_msr(struct vcpu_vmx *vmx);
#define POSTED_INTR_ON 0
#define POSTED_INTR_SN 1