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| author |   Paolo Bonzini <pbonzini@redhat.com> | 2015-02-06 12:58:42 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2015-04-08 10:46:54 +0200 |
| commit | 9c8fd1ba2201c072bd3cf6940e2ca4d0a7aed723 (patch) | |
| tree | cd49f3c0f47344a99e6337da700527ff10ff7a21 /arch/x86/kvm/x86.c | |
| parent | KVM: x86: extract blocking logic from __vcpu_run (diff) | |
| download | linux-dev-9c8fd1ba2201c072bd3cf6940e2ca4d0a7aed723.tar.xz linux-dev-9c8fd1ba2201c072bd3cf6940e2ca4d0a7aed723.zip | |
KVM: x86: optimize delivery of TSC deadline timer interrupt
The newly-added tracepoint shows the following results on
the tscdeadline_latency test:
qemu-kvm-8387 [002] 6425.558974: kvm_vcpu_wakeup: poll time 10407 ns
qemu-kvm-8387 [002] 6425.558984: kvm_vcpu_wakeup: poll time 0 ns
qemu-kvm-8387 [002] 6425.561242: kvm_vcpu_wakeup: poll time 10477 ns
qemu-kvm-8387 [002] 6425.561251: kvm_vcpu_wakeup: poll time 0 ns
and so on. This is because we need to go through kvm_vcpu_block again
after the timer IRQ is injected. Avoid it by polling once before
entering kvm_vcpu_block.
On my machine (Xeon E5 Sandy Bridge) this removes about 500 cycles (7%)
from the latency of the TSC deadline timer.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/x86/kvm/x86.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 6256dfa598a1..50861dd15a94 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -6406,12 +6406,13 @@ out: static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu) { - srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx); - kvm_vcpu_block(vcpu); - vcpu->srcu_idx = srcu_read_lock(&kvm->srcu); - - if (!kvm_check_request(KVM_REQ_UNHALT, vcpu)) - return 1; + if (!kvm_arch_vcpu_runnable(vcpu)) { + srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx); + kvm_vcpu_block(vcpu); + vcpu->srcu_idx = srcu_read_lock(&kvm->srcu); + if (!kvm_check_request(KVM_REQ_UNHALT, vcpu)) + return 1; + } kvm_apic_accept_events(vcpu); switch(vcpu->arch.mp_state) { |