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| author |   Max Filippov <jcmvbkbc@gmail.com> | 2012-12-11 01:26:24 +0400 |
|---|---|---|
| committer |   Chris Zankel <chris@zankel.net> | 2012-12-18 21:10:25 -0800 |
| commit | ec747b21c7c709a712e5eee0b4d4326d755d58b5 (patch) | |
| tree | 9f33109223bc7c04abdc8b2dabd19c259d60147e /arch/xtensa/mm/mmu.c | |
| parent | xtensa: initialize CPENABLE SR when core has one (diff) | |
| download | linux-dev-ec747b21c7c709a712e5eee0b4d4326d755d58b5.tar.xz linux-dev-ec747b21c7c709a712e5eee0b4d4326d755d58b5.zip | |
xtensa: fix RASID SR initialization
set_rasid_register accepts new RASID SR value, but ASID_USER_FIRST is
ASID value for the ring 1; RASID value is made by ASID_INSERT macro.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa/mm/mmu.c')
| -rw-r--r-- | arch/xtensa/mm/mmu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/xtensa/mm/mmu.c b/arch/xtensa/mm/mmu.c index ca81654f3ec2..0f77f9d3bb8b 100644 --- a/arch/xtensa/mm/mmu.c +++ b/arch/xtensa/mm/mmu.c @@ -37,7 +37,7 @@ void __init init_mmu(void) /* Set rasid register to a known value. */ - set_rasid_register(ASID_USER_FIRST); + set_rasid_register(ASID_INSERT(ASID_USER_FIRST)); /* Set PTEVADDR special register to the start of the page * table, which is in kernel mappable space (ie. not |