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| author |   Max Filippov <jcmvbkbc@gmail.com> | 2022-01-03 12:08:31 -0800 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2022-03-22 09:45:09 -0700 |
| commit | 1c4664faa38923330d478f046dc743a00c1e2dec (patch) | |
| tree | e00e486d8838a5f2e9d48b2c8989bae1cb60a16f /arch/xtensa/mm/tlb.c | |
| parent | xtensa: fix xtensa_wsr always writing 0 (diff) | |
| download | linux-dev-1c4664faa38923330d478f046dc743a00c1e2dec.tar.xz linux-dev-1c4664faa38923330d478f046dc743a00c1e2dec.zip | |
xtensa: define update_mmu_tlb function
Before the commit f9ce0be71d1f ("mm: Cleanup faultaround and finish_fault()
codepaths") there was a call to update_mmu_cache in alloc_set_pte that
used to invalidate TLB entry caching invalid PTE that caused a page
fault. That commit removed that call so now invalid TLB entry survives
causing repetitive page faults on the CPU that took the initial fault
until that TLB entry is occasionally evicted. This issue is spotted by
the xtensa TLB sanity checker.
Fix this issue by defining update_mmu_tlb function that flushes TLB entry
for the faulting address.
Cc: stable@vger.kernel.org # 5.12+
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/xtensa/mm/tlb.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/xtensa/mm/tlb.c b/arch/xtensa/mm/tlb.c index f436cf2efd8b..27a477dae232 100644 --- a/arch/xtensa/mm/tlb.c +++ b/arch/xtensa/mm/tlb.c @@ -162,6 +162,12 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) } } +void update_mmu_tlb(struct vm_area_struct *vma, + unsigned long address, pte_t *ptep) +{ + local_flush_tlb_page(vma, address); +} + #ifdef CONFIG_DEBUG_TLB_SANITY static unsigned get_pte_for_vaddr(unsigned vaddr) |