aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorClaudiu Manoil <claudiu.manoil@nxp.com>2019-02-26 15:42:21 +0200
committerDavid S. Miller <davem@davemloft.net>2019-03-01 11:21:32 -0800
commit0c805404f083cad1cd5a79eda421d726ce76e63a (patch)
tree7949a0c9addfe65e98ae44b7fc7dcf70b57a7d38 /arch
parentarm64: dts: fsl: ls1028a: Add PCI IERC node and ENETC endpoints (diff)
downloadlinux-dev-0c805404f083cad1cd5a79eda421d726ce76e63a.tar.xz
linux-dev-0c805404f083cad1cd5a79eda421d726ce76e63a.zip
arm64: dts: fsl: ls1028a-rdb: Add ENETC external eth ports for the LS1028A RDB board
The LS1028A RDB board features an Atheros PHY connected over SGMII to the ENETC PF0 (or Port0). ENETC Port1 (PF1) has no external connection on this board, so it can be disabled for now. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
index fdeb4176fc33..f86b054a74ae 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
@@ -71,3 +71,20 @@
&duart1 {
status = "okay";
};
+
+&enetc_port0 {
+ phy-handle = <&sgmii_phy0>;
+ phy-connection-type = "sgmii";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ sgmii_phy0: ethernet-phy@2 {
+ reg = <0x2>;
+ };
+ };
+};
+
+&enetc_port1 {
+ status = "disabled";
+};