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| author |   changzhu <Changfeng.Zhu@amd.com> | 2019-11-19 11:13:29 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2019-11-22 14:55:19 -0500 |
| commit | f920d1bb9c4e77efb08c41d70b6d442f46fd8902 (patch) | |
| tree | c560b92f063d212f13ae9f534f644c1ed4e9a39d /drivers/gpu/drm/amd/amdgpu/soc15.h | |
| parent | drm/amdgpu: initialize vm_inv_eng0_sem for gfxhub and mmhub (diff) | |
| download | linux-dev-f920d1bb9c4e77efb08c41d70b6d442f46fd8902.tar.xz linux-dev-f920d1bb9c4e77efb08c41d70b6d442f46fd8902.zip | |
drm/amdgpu: invalidate mmhub semaphore workaround in gmc9/gmc10
It may lose gpuvm invalidate acknowldege state across power-gating off
cycle. To avoid this issue in gmc9/gmc10 invalidation, add semaphore acquire
before invalidation and semaphore release after invalidation.
After adding semaphore acquire before invalidation, the semaphore
register become read-only if another process try to acquire semaphore.
Then it will not be able to release this semaphore. Then it may cause
deadlock problem. If this deadlock problem happens, it needs a semaphore
firmware fix.
Signed-off-by: changzhu <Changfeng.Zhu@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to '')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h index 9af6c6ffbfa2..57af489a5de3 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.h +++ b/drivers/gpu/drm/amd/amdgpu/soc15.h @@ -28,8 +28,8 @@ #include "nbio_v7_0.h" #include "nbio_v7_4.h" -#define SOC15_FLUSH_GPU_TLB_NUM_WREG 4 -#define SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT 1 +#define SOC15_FLUSH_GPU_TLB_NUM_WREG 6 +#define SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT 3 extern const struct amd_ip_funcs soc15_common_ip_funcs; |