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| author |   Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> | 2021-07-08 12:59:59 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2021-07-21 14:23:57 -0400 |
| commit | a8e380fd8d71493623c94511f75e81786cffa223 (patch) | |
| tree | 81df4d87edb6bfdd38495b8a1079bb1a0d49773c /drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | |
| parent | drm/amd/display: Query VCO frequency from register for DCN3.1 (diff) | |
| download | linux-dev-a8e380fd8d71493623c94511f75e81786cffa223.tar.xz linux-dev-a8e380fd8d71493623c94511f75e81786cffa223.zip | |
drm/amd/display: Update bounding box for DCN3.1
[Why & How]
We're missing a default value for dram_channel_width_bytes in the
DCN3.1 SOC bounding box and we don't currently have the interface in
place to query the actual value from VBIOS.
Put in a hardcoded default until we have the interface in place.
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions