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| author |   José Roberto de Souza <jose.souza@intel.com> | 2021-09-14 14:25:03 -0700 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2021-09-17 10:58:47 -0700 |
| commit | 72fe6ca84f080a01218d9208e2fa8ce8baaec548 (patch) | |
| tree | f37fd954f92b33225484aac8a83ad56ad20d6055 /drivers/gpu/drm/i915/display/intel_psr.c | |
| parent | drm/i915/dmc: Update to DMC v2.12 (diff) | |
| download | linux-dev-72fe6ca84f080a01218d9208e2fa8ce8baaec548.tar.xz linux-dev-72fe6ca84f080a01218d9208e2fa8ce8baaec548.zip | |
drm/i915/display/adlp: Fix PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR calculation
As the SU_REGION_START begins at 0, the SU_REGION_END should be number
of lines - 1.
BSpec: 50424
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210914212507.177511-1-jose.souza@intel.com
Diffstat (limited to '')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_psr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 3f6fb7d67f84..36816abb3bcc 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1501,7 +1501,7 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state, if (IS_ALDERLAKE_P(dev_priv)) { val |= ADLP_PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(clip->y1); - val |= ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(clip->y2); + val |= ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(clip->y2 - 1); } else { drm_WARN_ON(crtc_state->uapi.crtc->dev, clip->y1 % 4 || clip->y2 % 4); |