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authorChris Wilson <chris@chris-wilson.co.uk>2021-01-14 10:14:51 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2021-01-14 12:07:28 +0000
commit3db9353ea32c7f7816de8e48c7a3b5f00b3a59ba (patch)
treebb88526b3290f5e4290ec9b532bdaf05163f3e7f /drivers/gpu/drm/i915/gt/gen6_ppgtt.c
parentdrm/i915/selftests: fix the uint*_t types that have crept in (diff)
downloadlinux-dev-3db9353ea32c7f7816de8e48c7a3b5f00b3a59ba.tar.xz
linux-dev-3db9353ea32c7f7816de8e48c7a3b5f00b3a59ba.zip
drm/i915/gt: Reapply ppgtt enabling after engine resets
The GFX_MODE is reset along with the engine, turning off ppGTT. We need to re-enable it upon resume afterwards. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210114101451.24762-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/gen6_ppgtt.c')
-rw-r--r--drivers/gpu/drm/i915/gt/gen6_ppgtt.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
index 680bd9442eb0..0f02afe7f43a 100644
--- a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
@@ -27,8 +27,6 @@ void gen7_ppgtt_enable(struct intel_gt *gt)
{
struct drm_i915_private *i915 = gt->i915;
struct intel_uncore *uncore = gt->uncore;
- struct intel_engine_cs *engine;
- enum intel_engine_id id;
u32 ecochk;
intel_uncore_rmw(uncore, GAC_ECO_BITS, 0, ECOBITS_PPGTT_CACHE64B);
@@ -41,13 +39,6 @@ void gen7_ppgtt_enable(struct intel_gt *gt)
ecochk &= ~ECOCHK_PPGTT_GFDT_IVB;
}
intel_uncore_write(uncore, GAM_ECOCHK, ecochk);
-
- for_each_engine(engine, gt, id) {
- /* GFX_MODE is per-ring on gen7+ */
- ENGINE_WRITE(engine,
- RING_MODE_GEN7,
- _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE));
- }
}
void gen6_ppgtt_enable(struct intel_gt *gt)