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authorRodrigo Vivi <rodrigo.vivi@intel.com>2014-12-03 04:55:26 -0800
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-12-17 18:18:19 +0100
commit1eb0f0061d8234ed204a1c6ed9e8bb8dcefa2789 (patch)
tree964d9b5cff27f7b0a244172f825f01568734bf97 /drivers/gpu/drm/i915/i915_gem_gtt.c
parentdrm/i915: Organize Fence registers for future enablement. (diff)
downloadlinux-dev-1eb0f0061d8234ed204a1c6ed9e8bb8dcefa2789.tar.xz
linux-dev-1eb0f0061d8234ed204a1c6ed9e8bb8dcefa2789.zip
drm/i915: Organize PPGTT init
Let's be optimistic that for future platforms memory management doesn't change that much and reuse gen8 function for PPGTT init. Cc: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to '')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_gtt.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 75a29a382208..82cb5666583f 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1165,10 +1165,8 @@ static int __hw_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
if (INTEL_INFO(dev)->gen < 8)
return gen6_ppgtt_init(ppgtt);
- else if (IS_GEN8(dev) || IS_GEN9(dev))
- return gen8_ppgtt_init(ppgtt, dev_priv->gtt.base.total);
else
- BUG();
+ return gen8_ppgtt_init(ppgtt, dev_priv->gtt.base.total);
}
int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
{