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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2018-06-14 15:10:17 -0700
committerPaulo Zanoni <paulo.r.zanoni@intel.com>2018-06-15 15:06:00 -0700
commit9378985eb05c486b32a61b69945df3297c6e854d (patch)
treed45cdc90be600dcbc6f8adb6e612c7fd807b9224 /drivers/gpu/drm/i915/intel_ddi.c
parentdrm/i915: s/IS_G4X && !IS_GM45/IS_G45/ (diff)
downloadlinux-dev-9378985eb05c486b32a61b69945df3297c6e854d.tar.xz
linux-dev-9378985eb05c486b32a61b69945df3297c6e854d.zip
drm/i915/icl: implement DVFS for ICL
ICL DVFS is almost the same as CNL, except for the CDCLK/DDICLK table. Implement it just like CNL does. References: commit 48469eced282 ("drm/i915: Use cdclk_state->voltage on CNL") References: commit 53e9bf5e8159 ("drm/i915: Adjust system agent voltage on CNL if required by DDI ports") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180614221018.19044-1-paulo.r.zanoni@intel.com
Diffstat (limited to '')
-rw-r--r--drivers/gpu/drm/i915/intel_ddi.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index ce153b11c765..044fe1fb9872 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3078,6 +3078,8 @@ void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
{
if (IS_CANNONLAKE(dev_priv) && crtc_state->port_clock > 594000)
crtc_state->min_voltage_level = 2;
+ else if (IS_ICELAKE(dev_priv) && crtc_state->port_clock > 594000)
+ crtc_state->min_voltage_level = 1;
}
void intel_ddi_get_config(struct intel_encoder *encoder,