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authorLinus Torvalds <torvalds@linux-foundation.org>2010-07-01 18:48:11 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-07-01 18:48:11 -0700
commit97e0214044d9f279a3d6286c9f859696ef0b7ebe (patch)
tree628d2b834ab581f6db54367baddee4f86112d22c /drivers/gpu/drm/i915/intel_dp.c
parentMerge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev (diff)
parentdrm/i915: fix page flip finish vs. prepare on plane B (diff)
downloadlinux-dev-97e0214044d9f279a3d6286c9f859696ef0b7ebe.tar.xz
linux-dev-97e0214044d9f279a3d6286c9f859696ef0b7ebe.zip
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: fix page flip finish vs. prepare on plane B drm/i915: change default panel fitting mode to preserve aspect ratio drm/i915: fix uninitialized variable warning in i915_setup_compression() drm/i915: take struct_mutex in i915_dma_cleanup() drm/i915: Fix CRT hotplug regression in 2.6.35-rc1 i915: fix ironlake edp panel setup (v4) drm/i915: don't access FW_BLC_SELF on 965G drm/i915: Account for space on the ring buffer consumed whilst wrapping. drm/i915: gen3 page flipping fixes drm/i915: don't queue flips during a flip pending event drm/i915: Fix incorrect intel_ring_begin size in BSD ringbuffer. drm/i915: Turn on 945 self-refresh only if single CRTC is active drm/i915/gen4: Fix interrupt setup ordering drm/i915: Use RSEN instead of HTPLG for tfp410 monitor detection. drm/i915: Move non-phys cursors into the GTT Revert "drm/i915: Don't enable pipe/plane/VCO early (wait for DPMS on)." (Included the "fix page flip finish vs. prepare on plane B" patch from Jesse on top of the pull request from Eric. -- Linus)
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c27
1 files changed, 24 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 49b54f05d3cf..1aac59e83bff 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -136,6 +136,12 @@ intel_dp_link_required(struct drm_device *dev,
}
static int
+intel_dp_max_data_rate(int max_link_clock, int max_lanes)
+{
+ return (max_link_clock * max_lanes * 8) / 10;
+}
+
+static int
intel_dp_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
{
@@ -144,8 +150,11 @@ intel_dp_mode_valid(struct drm_connector *connector,
int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_encoder));
int max_lanes = intel_dp_max_lane_count(intel_encoder);
- if (intel_dp_link_required(connector->dev, intel_encoder, mode->clock)
- > max_link_clock * max_lanes)
+ /* only refuse the mode on non eDP since we have seen some wierd eDP panels
+ which are outside spec tolerances but somehow work by magic */
+ if (!IS_eDP(intel_encoder) &&
+ (intel_dp_link_required(connector->dev, intel_encoder, mode->clock)
+ > intel_dp_max_data_rate(max_link_clock, max_lanes)))
return MODE_CLOCK_HIGH;
if (mode->clock < 10000)
@@ -506,7 +515,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
for (clock = 0; clock <= max_clock; clock++) {
- int link_avail = intel_dp_link_clock(bws[clock]) * lane_count;
+ int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
if (intel_dp_link_required(encoder->dev, intel_encoder, mode->clock)
<= link_avail) {
@@ -521,6 +530,18 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
}
}
}
+
+ if (IS_eDP(intel_encoder)) {
+ /* okay we failed just pick the highest */
+ dp_priv->lane_count = max_lane_count;
+ dp_priv->link_bw = bws[max_clock];
+ adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw);
+ DRM_DEBUG_KMS("Force picking display port link bw %02x lane "
+ "count %d clock %d\n",
+ dp_priv->link_bw, dp_priv->lane_count,
+ adjusted_mode->clock);
+ return true;
+ }
return false;
}