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| author |   Manasi Navare <manasi.d.navare@intel.com> | 2018-06-11 15:26:54 -0700 |
|---|---|---|
| committer |   Paulo Zanoni <paulo.r.zanoni@intel.com> | 2018-06-14 14:57:01 -0700 |
| commit | 46b527d19c4327897197d09748a8b332e322a1d7 (patch) | |
| tree | d542151a07870c6a10da142f8a8d079a9bb48b66 /drivers/gpu/drm/i915/intel_drv.h | |
| parent | drm/i915/icl: start adding the TBT pll (diff) | |
| download | linux-dev-46b527d19c4327897197d09748a8b332e322a1d7.tar.xz linux-dev-46b527d19c4327897197d09748a8b332e322a1d7.zip | |
drm/i915/icl: Add allowed DP rates for Icelake
For ICL, on Combo PHY the allowed max rates are:
- HBR3 8.1 eDP (DDIA)
- HBR2 5.4 DisplayPort (DDIB)
and for MG PHY/TC DDI Ports allowed DP rates are:
- HBR3 8.1 DisplayPort (DP alternate mode, DP over TBT,
- DP on legacy connector - DDIC/D/E/F)
v2 (from Paulo): Remove misleading comment (Ville).
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Reviewed-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: James Ausmus <james.ausmus@intel.com>
[Paulo: bikeshed to keep future platforms on "else", v2.]
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180611222655.5696-1-paulo.r.zanoni@intel.com
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions