diff options
| author |   Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2018-06-02 12:29:45 +0100 |
|---|---|---|
| committer | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2018-06-04 18:12:54 +0100 |
| commit | 218b5000982b7c5e7433b86819be92f95984a1ae (patch) | |
| tree | 3a5762a402305f37d9cddd87f25153cf5441ef36 /drivers/gpu/drm/i915/intel_lrc.c | |
| parent | drm/i915/gtt: Remove obsolete switch_mm hooks for gen8+ (diff) | |
| download | linux-dev-218b5000982b7c5e7433b86819be92f95984a1ae.tar.xz linux-dev-218b5000982b7c5e7433b86819be92f95984a1ae.zip | |
drm/i915: drop one bit on the hw_id when using guc
We currently using GuC as a proxy to the hardware. When Guc is used in
such mode, it consumes the bit 20 of the hw_id to indicate that the
workload was submitted by proxy.
So far we probably haven't seen the issue because we need to allocate
1048576+ contexts to hit this issue. Still, we should avoid allocating
the hw_id on that bit and restriction to bits [0:19] (i.e 20bits
instead of 21).
v2: Leave the max hw_id computation in i915_gem_context.c (Michel)
v3: Be consistent on if/else usage (Chris)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
BSpec: 1237
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180602112946.30803-2-lionel.g.landwerlin@intel.com
Diffstat (limited to '')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lrc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 38696d9cc02e..cbc2a8d4dc9c 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -200,7 +200,7 @@ static inline bool need_preempt(const struct intel_engine_cs *engine, * * bits 0-11: flags, GEN8_CTX_* (cached in ctx->desc_template) * bits 12-31: LRCA, GTT address of (the HWSP of) this context - * bits 32-52: ctx ID, a globally unique tag + * bits 32-52: ctx ID, a globally unique tag (highest bit used by GuC) * bits 53-54: mbz, reserved for use by hardware * bits 55-63: group ID, currently unused and set to 0 * |