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| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-01-22 21:32:46 +0200 |
|---|---|---|
| committer |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-01-28 14:18:57 +0100 |
| commit | 031994ee8dedfa69d3a7caa43e93f3c282bc38f9 (patch) | |
| tree | 13ca1e9a88a55bd7aa5af5bc5c5c008a0fb94800 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | drm/i915: Create a USES_PPGTT macro (diff) | |
| download | linux-dev-031994ee8dedfa69d3a7caa43e93f3c282bc38f9.tar.xz linux-dev-031994ee8dedfa69d3a7caa43e93f3c282bc38f9.zip | |
drm/i915: Implement WaIncreaseL3CreditsForVLVB0:vlv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 4960314a3611..58053f887b37 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4991,6 +4991,12 @@ static void valleyview_init_clock_gating(struct drm_device *dev) _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE)); /* + * WaIncreaseL3CreditsForVLVB0:vlv + * This is the hardware default actually. + */ + I915_WRITE(GEN7_L3SQCREG1, VLV_B0_WA_L3SQCREG1_VALUE); + + /* * WaDisableVLVClockGating_VBIIssue:vlv * Disable clock gating on th GCFG unit to prevent a delay * in the reporting of vblank events. |