diff options
| author |   José Roberto de Souza <jose.souza@intel.com> | 2018-12-03 16:33:58 -0800 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2018-12-04 12:12:31 -0800 |
| commit | 98751b8cd608a38f810e190c58c94906923ff668 (patch) | |
| tree | af691895ee7c0fac1e2df30234d4cc959cf4e221 /drivers/gpu/drm/i915/intel_psr.c | |
| parent | drm/i915/psr: Set PSR CRC verification bit in sink inside PSR1 block (diff) | |
| download | linux-dev-98751b8cd608a38f810e190c58c94906923ff668.tar.xz linux-dev-98751b8cd608a38f810e190c58c94906923ff668.zip | |
drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch
eDP spec states 2 different bits to enable sink to trigger a
interruption when there is a CRC mismatch.
DP_PSR_CRC_VERIFICATION is for PSR only and
DP_PSR_IRQ_HPD_WITH_CRC_ERRORS is for PSR2 only.
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181204003403.23361-4-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_psr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_psr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 8342c33ede04..e463bef3c804 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -394,7 +394,7 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp) if (dev_priv->psr.psr2_enabled) { drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, DP_ALPM_ENABLE); - dpcd_val |= DP_PSR_ENABLE_PSR2; + dpcd_val |= DP_PSR_ENABLE_PSR2 | DP_PSR_IRQ_HPD_WITH_CRC_ERRORS; } else { if (dev_priv->psr.link_standby) dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE; |