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| author |   Thierry Reding <treding@nvidia.com> | 2019-12-09 13:00:05 +0100 |
|---|---|---|
| committer |   Ben Skeggs <bskeggs@redhat.com> | 2020-01-15 10:49:59 +1000 |
| commit | d7ca5ddf585e20e879e3ebe3e5be0a0477b700b8 (patch) | |
| tree | fb46298a50b70539c2b39cd6fc96a2401d35eff5 /drivers/gpu/drm/nouveau/nvkm | |
| parent | drm/nouveau/ltc/gp10b: Add custom L2 cache implementation (diff) | |
| download | linux-dev-d7ca5ddf585e20e879e3ebe3e5be0a0477b700b8.tar.xz linux-dev-d7ca5ddf585e20e879e3ebe3e5be0a0477b700b8.zip | |
drm/nouveau/ce/gp10b: Use correct copy engine
gp10b uses the new engine enumeration mechanism introduced in the Pascal
architecture. As a result, the copy engine, which used to be at index 2
for prior Tegra GPU instantiations, has now moved to index 0. Fix up the
index and also use the gp100 variant of the copy engine class because on
gp10b the PASCAL_DMA_COPY_B class is not supported.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 231ec0073af3..eba450e689b2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -2387,7 +2387,7 @@ nv13b_chipset = { .pmu = gm20b_pmu_new, .timer = gk20a_timer_new, .top = gk104_top_new, - .ce[2] = gp102_ce_new, + .ce[0] = gp100_ce_new, .dma = gf119_dma_new, .fifo = gp10b_fifo_new, .gr = gp10b_gr_new, |