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authorAlexander Shishkin <alexander.shishkin@linux.intel.com>2019-05-03 11:44:38 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-05-03 18:14:29 +0200
commitfc027f4ce7c718660e046c3269b303bdbe692fda (patch)
tree5da366e76071ae7860dbb9a1360d2934b4eedc7a /drivers/hwtracing/intel_th/pci.c
parentintel_th: Skip subdevices if their MMIO is missing (diff)
downloadlinux-dev-fc027f4ce7c718660e046c3269b303bdbe692fda.tar.xz
linux-dev-fc027f4ce7c718660e046c3269b303bdbe692fda.zip
intel_th: Add "rtit" source device
In some versions of Intel TH, the Software Trace Hub (STH) has a second MMIO BAR dedicated to the input from Intel PT. This calls for a new subdevice that will be enumerated if the corresponding BAR is present. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to '')
-rw-r--r--drivers/hwtracing/intel_th/pci.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/hwtracing/intel_th/pci.c b/drivers/hwtracing/intel_th/pci.c
index 9dd2d75bd539..fd8267bbaf2c 100644
--- a/drivers/hwtracing/intel_th/pci.c
+++ b/drivers/hwtracing/intel_th/pci.c
@@ -20,6 +20,7 @@
enum {
TH_PCI_CONFIG_BAR = 0,
TH_PCI_STH_SW_BAR = 2,
+ TH_PCI_RTIT_BAR = 4,
};
#define BAR_MASK (BIT(TH_PCI_CONFIG_BAR) | BIT(TH_PCI_STH_SW_BAR))
@@ -75,8 +76,8 @@ static int intel_th_pci_probe(struct pci_dev *pdev,
[TH_MMIO_CONFIG] = pdev->resource[TH_PCI_CONFIG_BAR],
[TH_MMIO_SW] = pdev->resource[TH_PCI_STH_SW_BAR],
};
+ int err, r = TH_MMIO_SW + 1;
struct intel_th *th;
- int err;
err = pcim_enable_device(pdev);
if (err)
@@ -86,8 +87,12 @@ static int intel_th_pci_probe(struct pci_dev *pdev,
if (err)
return err;
- th = intel_th_alloc(&pdev->dev, drvdata, resource, TH_MMIO_END,
- pdev->irq);
+ if (pdev->resource[TH_PCI_RTIT_BAR].start) {
+ resource[TH_MMIO_RTIT] = pdev->resource[TH_PCI_RTIT_BAR];
+ r++;
+ }
+
+ th = intel_th_alloc(&pdev->dev, drvdata, resource, r, pdev->irq);
if (IS_ERR(th))
return PTR_ERR(th);