aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/infiniband/hw/hns/hns_roce_main.c
diff options
context:
space:
mode:
authorYixing Liu <liuyixing1@huawei.com>2022-04-29 17:35:45 +0800
committerJason Gunthorpe <jgg@nvidia.com>2022-05-04 21:34:11 -0300
commitdb5dfbf5b201df65c1f5332c4d9d5e7c2f42396b (patch)
tree874d4b498956493896ba79f69d0ec17198b46c84 /drivers/infiniband/hw/hns/hns_roce_main.c
parentRDMA/hns: Add the detection for CMDQ status in the device initialization process (diff)
downloadlinux-dev-db5dfbf5b201df65c1f5332c4d9d5e7c2f42396b.tar.xz
linux-dev-db5dfbf5b201df65c1f5332c4d9d5e7c2f42396b.zip
RDMA/hns: Remove the num_cqc_timer variable
The bt number of cqc_timer of HIP09 increases compared with that of HIP08. Therefore, cqc_timer_bt_num and num_cqc_timer do not match. As a result, the driver may fail to allocate cqc_timer. So the driver needs to uniquely uses cqc_timer_bt_num to represent the bt number of cqc_timer. Fixes: 0e40dc2f70cd ("RDMA/hns: Add timer allocation support for hip08") Link: https://lore.kernel.org/r/20220429093545.58070-1-liangwenpeng@huawei.com Signed-off-by: Yixing Liu <liuyixing1@huawei.com> Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to '')
-rw-r--r--drivers/infiniband/hw/hns/hns_roce_main.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/hns/hns_roce_main.c b/drivers/infiniband/hw/hns/hns_roce_main.c
index f73ba619f375..c8af4ebd7cbd 100644
--- a/drivers/infiniband/hw/hns/hns_roce_main.c
+++ b/drivers/infiniband/hw/hns/hns_roce_main.c
@@ -737,7 +737,7 @@ static int hns_roce_init_hem(struct hns_roce_dev *hr_dev)
ret = hns_roce_init_hem_table(hr_dev, &hr_dev->cqc_timer_table,
HEM_TYPE_CQC_TIMER,
hr_dev->caps.cqc_timer_entry_sz,
- hr_dev->caps.num_cqc_timer, 1);
+ hr_dev->caps.cqc_timer_bt_num, 1);
if (ret) {
dev_err(dev,
"Failed to init CQC timer memory, aborting.\n");