diff options
| author |   Aharon Landau <aharonl@nvidia.com> | 2022-02-15 19:55:32 +0200 |
|---|---|---|
| committer |   Jason Gunthorpe <jgg@nvidia.com> | 2022-02-23 14:59:13 -0400 |
| commit | 9ee2516c43823652da597633aed9646dac51c1f8 (patch) | |
| tree | a0ae693e2d20aa05b6e84004bf51da5f3ffc8f7f /drivers/infiniband/hw/mlx5/mlx5_ib.h | |
| parent | RDMA/mlx5: Merge similar flows of allocating MR from the cache (diff) | |
| download | linux-dev-9ee2516c43823652da597633aed9646dac51c1f8.tar.xz linux-dev-9ee2516c43823652da597633aed9646dac51c1f8.zip | |
RDMA/mlx5: Store ndescs instead of the translation table size
Currently, ent->xlt stores the translation table size. This data should
not be stored in the cache entry but be written directly to the mailbox.
Store ndescs instead, and deduce the translation table size from it
according to the access mode.
Link: https://lore.kernel.org/r/e9dbfaa1f279793a6bd28ee5a31cb4f0f0d70f05.1644947594.git.leonro@nvidia.com
Signed-off-by: Aharon Landau <aharonl@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'drivers/infiniband/hw/mlx5/mlx5_ib.h')
| -rw-r--r-- | drivers/infiniband/hw/mlx5/mlx5_ib.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h index 751d02bc755b..4f04bb55c4c6 100644 --- a/drivers/infiniband/hw/mlx5/mlx5_ib.h +++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h @@ -763,9 +763,9 @@ struct mlx5_cache_ent { char name[4]; u32 order; - u32 xlt; u32 access_mode; u32 page; + unsigned int ndescs; u8 disabled:1; u8 fill_to_high_water:1; |