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| author |   Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> | 2019-01-11 12:41:40 -0500 |
|---|---|---|
| committer |   Mauro Carvalho Chehab <mchehab+samsung@kernel.org> | 2019-02-18 11:24:49 -0500 |
| commit | ac105ab2138f43b7acbc91f17453e0a0ba2f7f33 (patch) | |
| tree | f6319694bd7108fee4b620e977d982795c0000ec /drivers/media/i2c/adv748x/adv748x.h | |
| parent | media: adv748x: Implement TX link_setup callback (diff) | |
| download | linux-dev-ac105ab2138f43b7acbc91f17453e0a0ba2f7f33.tar.xz linux-dev-ac105ab2138f43b7acbc91f17453e0a0ba2f7f33.zip | |
media: i2c: adv748x: Convert SW reset routine to function
The ADV748x is currently reset by writting a small table of registers to
the device.
The table lacks documentation and contains magic values to perform the
actions, including using a fake register address to introduce a delay
loop.
Remove the table, and convert to code, documenting the purpose of the
specific writes along the way.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Diffstat (limited to '')
| -rw-r--r-- | drivers/media/i2c/adv748x/adv748x.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/media/i2c/adv748x/adv748x.h b/drivers/media/i2c/adv748x/adv748x.h index b00c1995efb0..2f8d751cfbb0 100644 --- a/drivers/media/i2c/adv748x/adv748x.h +++ b/drivers/media/i2c/adv748x/adv748x.h @@ -211,6 +211,11 @@ struct adv748x_state { #define ADV748X_IO_PD 0x00 /* power down controls */ #define ADV748X_IO_PD_RX_EN BIT(6) +#define ADV748X_IO_REG_01 0x01 /* pwrdn{2}b, prog_xtal_freq */ +#define ADV748X_IO_REG_01_PWRDN_MASK (BIT(7) | BIT(6)) +#define ADV748X_IO_REG_01_PWRDN2B BIT(7) /* CEC Wakeup Support */ +#define ADV748X_IO_REG_01_PWRDNB BIT(6) /* CEC Wakeup Support */ + #define ADV748X_IO_REG_04 0x04 #define ADV748X_IO_REG_04_FORCE_FR BIT(0) /* Force CP free-run */ @@ -229,8 +234,19 @@ struct adv748x_state { #define ADV748X_IO_CHIP_REV_ID_1 0xdf #define ADV748X_IO_CHIP_REV_ID_2 0xe0 +#define ADV748X_IO_REG_F2 0xf2 +#define ADV748X_IO_REG_F2_READ_AUTO_INC BIT(0) + +/* For PAGE slave address offsets */ #define ADV748X_IO_SLAVE_ADDR_BASE 0xf2 +/* + * The ADV748x_Recommended_Settings_PrA_2014-08-20.pdf details both 0x80 and + * 0xff as examples for performing a software reset. + */ +#define ADV748X_IO_REG_FF 0xff +#define ADV748X_IO_REG_FF_MAIN_RESET 0xff + /* HDMI RX Map */ #define ADV748X_HDMI_LW1 0x07 /* line width_1 */ #define ADV748X_HDMI_LW1_VERT_FILTER BIT(7) |