diff options
| author |   Tokunori Ikegami <ikegami.t@gmail.com> | 2022-03-24 02:04:57 +0900 |
|---|---|---|
| committer |   Miquel Raynal <miquel.raynal@bootlin.com> | 2022-04-28 10:17:22 +0200 |
| commit | cccea9414dae8058ce9c48b7c7ccff040501f419 (patch) | |
| tree | 81914c3c6098caaf5aa1acfc7a98e9fafabb995d /drivers/mtd/chips/cfi_cmdset_0002.c | |
| parent | mtd: cfi_cmdset_0002: Use chip_ready() for write on S29GL064N (diff) | |
| download | linux-dev-cccea9414dae8058ce9c48b7c7ccff040501f419.tar.xz linux-dev-cccea9414dae8058ce9c48b7c7ccff040501f419.zip | |
mtd: cfi_cmdset_0002: Add S29GL064N ID definition
It is for the model number 01, 02, V1 and V2.
Signed-off-by: Tokunori Ikegami <ikegami.t@gmail.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220323170458.5608-4-ikegami.t@gmail.com
Diffstat (limited to '')
| -rw-r--r-- | drivers/mtd/chips/cfi_cmdset_0002.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c index 59334530dd46..b31439e44435 100644 --- a/drivers/mtd/chips/cfi_cmdset_0002.c +++ b/drivers/mtd/chips/cfi_cmdset_0002.c @@ -48,6 +48,7 @@ #define SST49LF040B 0x0050 #define SST49LF008A 0x005a #define AT49BV6416 0x00d6 +#define S29GL064N_MN12 0x0c01 /* * Status Register bit description. Used by flash devices that don't @@ -445,7 +446,7 @@ static void fixup_quirks(struct mtd_info *mtd) struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; - if (cfi->mfr == CFI_MFR_AMD && cfi->id == 0x0c01) + if (cfi->mfr == CFI_MFR_AMD && cfi->id == S29GL064N_MN12) cfi->quirks |= CFI_QUIRK_DQ_TRUE_DATA; } @@ -475,7 +476,7 @@ static struct cfi_fixup cfi_fixup_table[] = { { CFI_MFR_AMD, 0x0056, fixup_use_secsi }, { CFI_MFR_AMD, 0x005C, fixup_use_secsi }, { CFI_MFR_AMD, 0x005F, fixup_use_secsi }, - { CFI_MFR_AMD, 0x0c01, fixup_s29gl064n_sectors }, + { CFI_MFR_AMD, S29GL064N_MN12, fixup_s29gl064n_sectors }, { CFI_MFR_AMD, 0x1301, fixup_s29gl064n_sectors }, { CFI_MFR_AMD, 0x1a00, fixup_s29gl032n_sectors }, { CFI_MFR_AMD, 0x1a01, fixup_s29gl032n_sectors }, |