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authorBoris BREZILLON <boris.brezillon@free-electrons.com>2014-11-30 19:10:29 +0100
committerBrian Norris <computersforpeace@gmail.com>2014-12-01 00:41:50 -0800
commitda3bc42c1becfde026656df50ad155239d4e1a6b (patch)
tree3c316a22370984f58c5a603ee2644809104ee8f3 /drivers/mtd/nand/gpmi-nand/gpmi-nand.h
parentmtd: nand: gpmi: add gpmi_copy_bits function (diff)
downloadlinux-dev-da3bc42c1becfde026656df50ad155239d4e1a6b.tar.xz
linux-dev-da3bc42c1becfde026656df50ad155239d4e1a6b.zip
mtd: nand: gpmi: add proper raw access support
Several MTD users (either in user or kernel space) expect a valid raw access support to NAND chip devices. This is particularly true for testing tools which are often touching the data stored in a NAND chip in raw mode to artificially generate errors. The GPMI drivers do not implemenent raw access functions, and thus rely on default HW_ECC scheme implementation. The default implementation consider the data and OOB area as properly separated in their respective NAND section, which is not true for the GPMI controller. In this driver/controller some OOB data are stored at the beginning of the NAND data area (these data are called metadata in the driver), then ECC bytes are interleaved with data chunk (which is similar to the HW_ECC_SYNDROME scheme), and eventually the remaining bytes are used as OOB data. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to '')
-rw-r--r--drivers/mtd/nand/gpmi-nand/gpmi-nand.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
index 20da1f139853..544062f65020 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
@@ -189,6 +189,8 @@ struct gpmi_nand_data {
void *auxiliary_virt;
dma_addr_t auxiliary_phys;
+ void *raw_buffer;
+
/* DMA channels */
#define DMA_CHANS 8
struct dma_chan *dma_chans[DMA_CHANS];