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author | Arun Ramadoss <arun.ramadoss@microchip.com> | 2022-04-24 16:58:31 +0530 |
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committer | Paolo Abeni <pabeni@redhat.com> | 2022-04-26 10:19:34 +0200 |
commit | de6dd626d7082eda383ec77a5e06093c82122d10 (patch) | |
tree | 1840f091fe15d9c7e588b99c0e7714494d316fcb /drivers/net/dsa/microchip/ksz_common.h | |
parent | net: phy: LAN937x: add interrupt support for link detection (diff) | |
download | linux-dev-de6dd626d7082eda383ec77a5e06093c82122d10.tar.xz linux-dev-de6dd626d7082eda383ec77a5e06093c82122d10.zip |
net: dsa: ksz: added the generic port_stp_state_set function
The ksz8795 and ksz9477 uses the same algorithm for the
port_stp_state_set function except the register address is different. So
moved the algorithm to the ksz_common.c and used the dev_ops for
register read and write. This function can also used for the lan937x
part. Hence making it generic for all the parts.
Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20220424112831.11504-1-arun.ramadoss@microchip.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to '')
-rw-r--r-- | drivers/net/dsa/microchip/ksz_common.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index 485d4a948c38..4d978832c448 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -165,6 +165,8 @@ int ksz_port_bridge_join(struct dsa_switch *ds, int port, struct netlink_ext_ack *extack); void ksz_port_bridge_leave(struct dsa_switch *ds, int port, struct dsa_bridge bridge); +void ksz_port_stp_state_set(struct dsa_switch *ds, int port, + u8 state, int reg); void ksz_port_fast_age(struct dsa_switch *ds, int port); int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb, void *data); @@ -292,6 +294,11 @@ static inline void ksz_regmap_unlock(void *__mtx) mutex_unlock(mtx); } +/* STP State Defines */ +#define PORT_TX_ENABLE BIT(2) +#define PORT_RX_ENABLE BIT(1) +#define PORT_LEARN_DISABLE BIT(0) + /* Regmap tables generation */ #define KSZ_SPI_OP_RD 3 #define KSZ_SPI_OP_WR 2 |