diff options
| author |   Vivien Didelot <vivien.didelot@savoirfairelinux.com> | 2017-06-19 10:55:40 -0400 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2017-06-20 13:24:42 -0400 |
| commit | 6bff47bec258ef9edba192674fe7366898af137f (patch) | |
| tree | 095e0837c97e99d8044d97ae7a325d725622dcd8 /drivers/net/dsa/mv88e6xxx/global2.h | |
| parent | net: dsa: mv88e6xxx: prefix Global 2 Device Mapping macros (diff) | |
| download | linux-dev-6bff47bec258ef9edba192674fe7366898af137f.tar.xz linux-dev-6bff47bec258ef9edba192674fe7366898af137f.zip | |
net: dsa: mv88e6xxx: prefix Global 2 MGMT macros
Prefix and document the Global 2 MGMT registers macros.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx/global2.h | 23 |
1 files changed, 15 insertions, 8 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/global2.h b/drivers/net/dsa/mv88e6xxx/global2.h index dd9b243309a0..4c8ae59b49d4 100644 --- a/drivers/net/dsa/mv88e6xxx/global2.h +++ b/drivers/net/dsa/mv88e6xxx/global2.h @@ -22,15 +22,22 @@ #define GLOBAL2_INT_SOURCE 0x00 #define GLOBAL2_INT_SOURCE_WATCHDOG 15 #define GLOBAL2_INT_MASK 0x01 -#define GLOBAL2_MGMT_EN_2X 0x02 -#define GLOBAL2_MGMT_EN_0X 0x03 + +/* Offset 0x02: MGMT Enable Register 2x */ +#define MV88E6XXX_G2_MGMT_EN_2X 0x02 + +/* Offset 0x03: MGMT Enable Register 0x */ +#define MV88E6XXX_G2_MGMT_EN_0X 0x03 + #define GLOBAL2_FLOW_CONTROL 0x04 -#define GLOBAL2_SWITCH_MGMT 0x05 -#define GLOBAL2_SWITCH_MGMT_USE_DOUBLE_TAG_DATA BIT(15) -#define GLOBAL2_SWITCH_MGMT_PREVENT_LOOPS BIT(14) -#define GLOBAL2_SWITCH_MGMT_FLOW_CONTROL_MSG BIT(13) -#define GLOBAL2_SWITCH_MGMT_FORCE_FLOW_CTRL_PRI BIT(7) -#define GLOBAL2_SWITCH_MGMT_RSVD2CPU BIT(3) + +/* Offset 0x05: Switch Management Register */ +#define MV88E6XXX_G2_SWITCH_MGMT 0x05 +#define MV88E6XXX_G2_SWITCH_MGMT_USE_DOUBLE_TAG_DATA 0x8000 +#define MV88E6XXX_G2_SWITCH_MGMT_PREVENT_LOOPS 0x4000 +#define MV88E6XXX_G2_SWITCH_MGMT_FLOW_CTL_MSG 0x2000 +#define MV88E6XXX_G2_SWITCH_MGMT_FORCE_FLOW_CTL_PRI 0x0080 +#define MV88E6XXX_G2_SWITCH_MGMT_RSVD2CPU 0x0008 /* Offset 0x06: Device Mapping Table Register */ #define MV88E6XXX_G2_DEVICE_MAPPING 0x06 |