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| author |   Lendacky, Thomas <Thomas.Lendacky@amd.com> | 2017-06-28 13:43:26 -0500 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2017-06-29 15:14:19 -0400 |
| commit | 6f595959c095d8923b19196fea3e983dcb299f22 (patch) | |
| tree | b78e9054899d2b726a2260c6115d9304315c1f7e /drivers/net/ethernet/amd/xgbe/xgbe.h | |
| parent | amd-xgbe: Simplify the burst length settings (diff) | |
| download | linux-dev-6f595959c095d8923b19196fea3e983dcb299f22.tar.xz linux-dev-6f595959c095d8923b19196fea3e983dcb299f22.zip | |
amd-xgbe: Adjust register settings to improve performance
Add support to change some general performance settings and to provide
some performance settings based on the device that is probed.
This includes:
- Setting the maximum read/write outstanding request limit
- Reducing the AXI interface burst length size
- Selectively setting the Tx and Rx descriptor pre-fetch threshold
- Selectively setting additional cache coherency controls
Tested and verified on all versions of the hardware.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/amd/xgbe/xgbe.h')
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h index 4bf82eb23ae6..0938294f640a 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe.h +++ b/drivers/net/ethernet/amd/xgbe/xgbe.h @@ -171,6 +171,11 @@ #define XGBE_DMA_SYS_ARCR 0x00303030 #define XGBE_DMA_SYS_AWCR 0x30303030 +/* DMA cache settings - PCI device */ +#define XGBE_DMA_PCI_ARCR 0x00000003 +#define XGBE_DMA_PCI_AWCR 0x13131313 +#define XGBE_DMA_PCI_AWARCR 0x00000313 + /* DMA channel interrupt modes */ #define XGBE_IRQ_MODE_EDGE 0 #define XGBE_IRQ_MODE_LEVEL 1 @@ -921,6 +926,8 @@ struct xgbe_version_data { unsigned int ecc_support; unsigned int i2c_support; unsigned int irq_reissue_support; + unsigned int tx_desc_prefetch; + unsigned int rx_desc_prefetch; }; struct xgbe_prv_data { @@ -1000,6 +1007,7 @@ struct xgbe_prv_data { unsigned int coherent; unsigned int arcr; unsigned int awcr; + unsigned int awarcr; /* Service routine support */ struct workqueue_struct *dev_workqueue; @@ -1024,6 +1032,9 @@ struct xgbe_prv_data { /* Tx/Rx common settings */ unsigned int blen; unsigned int pbl; + unsigned int aal; + unsigned int rd_osr_limit; + unsigned int wr_osr_limit; /* Tx settings */ unsigned int tx_sf_mode; |