diff options
| author |   Claudiu Beznea <claudiu.beznea@microchip.com> | 2021-09-17 16:26:14 +0300 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2021-09-18 14:14:39 +0100 |
| commit | 1a9b5a26daf606868220f24b9783c0f37085454d (patch) | |
| tree | 76ecaa01745a60b9b6110fcb5d2a700d4436085e /drivers/net/ethernet/cadence/macb_main.c | |
| parent | net: macb: align for OSSMODE offset (diff) | |
| download | linux-dev-1a9b5a26daf606868220f24b9783c0f37085454d.tar.xz linux-dev-1a9b5a26daf606868220f24b9783c0f37085454d.zip | |
net: macb: add support for mii on rgmii
Cadence IP has option to enable MII support on RGMII interface. This
could be selected though bit 28 of network control register. This option
is not enabled on all the IP versions thus add a software capability to
be selected by the proper implementation of this IP.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ethernet/cadence/macb_main.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index d13fb1d31821..cdf3e35b5b33 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -684,6 +684,9 @@ static void macb_mac_config(struct phylink_config *config, unsigned int mode, } else if (state->interface == PHY_INTERFACE_MODE_10GBASER) { ctrl |= GEM_BIT(PCSSEL); ncr |= GEM_BIT(ENABLE_HS_MAC); + } else if (bp->caps & MACB_CAPS_MIIONRGMII && + bp->phy_interface == PHY_INTERFACE_MODE_MII) { + ncr |= MACB_BIT(MIIONRGMII); } } |