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| author |   Hariprasad Shenai <hariprasad@chelsio.com> | 2015-01-07 08:48:01 +0530 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2015-01-08 19:39:10 -0800 |
| commit | f1ff24aa95f5612c7744d1ff9b8394a9e09bc6c9 (patch) | |
| tree | 89256dd891b856473e72ce6985ff0340ba7d5ad2 /drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | |
| parent | cxgb4: Add support for devlog (diff) | |
| download | linux-dev-f1ff24aa95f5612c7744d1ff9b8394a9e09bc6c9.tar.xz linux-dev-f1ff24aa95f5612c7744d1ff9b8394a9e09bc6c9.zip | |
cxgb4: Add support for cim_la entry in debugfs
The CIM LA captures the embedded processor’s internal state. Optionally, it can
also trace the flow of data in and out of the embedded processor. Therefore, the
CIM LA output contains detailed information of what code the embedded processor
executed prior to the CIM LA capture.
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h index 4077227b5cea..3fe6eeb3a55e 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h @@ -2062,4 +2062,38 @@ #define PL_VF_WHOAMI_A 0x0 #define PL_VF_REVISION_A 0x8 +/* registers for module CIM */ +#define CIM_HOST_ACC_CTRL_A 0x7b50 +#define CIM_HOST_ACC_DATA_A 0x7b54 +#define UP_UP_DBG_LA_CFG_A 0x140 +#define UP_UP_DBG_LA_DATA_A 0x144 + +#define HOSTBUSY_S 17 +#define HOSTBUSY_V(x) ((x) << HOSTBUSY_S) +#define HOSTBUSY_F HOSTBUSY_V(1U) + +#define HOSTWRITE_S 16 +#define HOSTWRITE_V(x) ((x) << HOSTWRITE_S) +#define HOSTWRITE_F HOSTWRITE_V(1U) + +#define UPDBGLARDEN_S 1 +#define UPDBGLARDEN_V(x) ((x) << UPDBGLARDEN_S) +#define UPDBGLARDEN_F UPDBGLARDEN_V(1U) + +#define UPDBGLAEN_S 0 +#define UPDBGLAEN_V(x) ((x) << UPDBGLAEN_S) +#define UPDBGLAEN_F UPDBGLAEN_V(1U) + +#define UPDBGLARDPTR_S 2 +#define UPDBGLARDPTR_M 0xfffU +#define UPDBGLARDPTR_V(x) ((x) << UPDBGLARDPTR_S) + +#define UPDBGLAWRPTR_S 16 +#define UPDBGLAWRPTR_M 0xfffU +#define UPDBGLAWRPTR_G(x) (((x) >> UPDBGLAWRPTR_S) & UPDBGLAWRPTR_M) + +#define UPDBGLACAPTPCONLY_S 30 +#define UPDBGLACAPTPCONLY_V(x) ((x) << UPDBGLACAPTPCONLY_S) +#define UPDBGLACAPTPCONLY_F UPDBGLACAPTPCONLY_V(1U) + #endif /* __T4_REGS_H */ |