diff options
| author |   Weihang Li <liweihang@hisilicon.com> | 2019-06-03 10:09:19 +0800 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2019-06-03 15:32:50 -0700 |
| commit | 6aa5d07d83f44e72bf6e01e539bb81316bbf0fac (patch) | |
| tree | 701d4af34cdbfe8877ba2c0b2586026b4a770e80 /drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | |
| parent | net: hns3: set ops to null when unregister ad_dev (diff) | |
| download | linux-dev-6aa5d07d83f44e72bf6e01e539bb81316bbf0fac.tar.xz linux-dev-6aa5d07d83f44e72bf6e01e539bb81316bbf0fac.zip | |
net: hns3: add handling of two bits in MAC tunnel interrupts
LINK_UP and LINK_DOWN are two bits of MAC tunnel interrupts, but previous
HNS3 driver didn't handle them. If they were enabled, value of these two
bits will change during link down and link up, which will cause HNS3
driver keep receiving IRQ but can't handle them.
This patch adds handling of these two bits of interrupts, we will record
and clear them as what we do to other MAC tunnel interrupts.
Signed-off-by: Weihang Li <liweihang@hisilicon.com>
Signed-off-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h index 9645590c9294..c56b11e7451d 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h @@ -47,9 +47,9 @@ #define HCLGE_NCSI_ERR_INT_TYPE 0x9 #define HCLGE_MAC_COMMON_ERR_INT_EN 0x107FF #define HCLGE_MAC_COMMON_ERR_INT_EN_MASK 0x107FF -#define HCLGE_MAC_TNL_INT_EN GENMASK(7, 0) -#define HCLGE_MAC_TNL_INT_EN_MASK GENMASK(7, 0) -#define HCLGE_MAC_TNL_INT_CLR GENMASK(7, 0) +#define HCLGE_MAC_TNL_INT_EN GENMASK(9, 0) +#define HCLGE_MAC_TNL_INT_EN_MASK GENMASK(9, 0) +#define HCLGE_MAC_TNL_INT_CLR GENMASK(9, 0) #define HCLGE_PPU_MPF_ABNORMAL_INT0_EN GENMASK(31, 0) #define HCLGE_PPU_MPF_ABNORMAL_INT0_EN_MASK GENMASK(31, 0) #define HCLGE_PPU_MPF_ABNORMAL_INT1_EN GENMASK(31, 0) |