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author | 2021-06-08 21:08:30 +0800 | |
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committer | 2021-06-08 14:43:31 -0700 | |
commit | 8a95e360fd512f1cb55239645879b15d26bc7e21 (patch) | |
tree | 2fcd75916eddd3c46017e637f95a093218c37465 /drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | |
parent | net: hns3: add support for imp-handle ras capability (diff) | |
download | linux-dev-8a95e360fd512f1cb55239645879b15d26bc7e21.tar.xz linux-dev-8a95e360fd512f1cb55239645879b15d26bc7e21.zip |
net: hns3: update error recovery module and type
Update error recovery module and type for RoCE.
The enumeration values of module names and error types are not sorted
in sequence. If use the current printing mode, they cannot be correctly
printed.
Use the index mode, If mod_id and type_id match the enumerated value,
display the corresponding information.
Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
-rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index cf34216df171..9ff4210f6477 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -3343,8 +3343,7 @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval) /* check for vector0 msix event and hardware error event source */ if (msix_src_reg & HCLGE_VECTOR0_REG_MSIX_MASK || - hw_err_src_reg & HCLGE_RAS_REG_NFE_MASK || - hw_err_src_reg & HCLGE_RAS_REG_ROCEE_ERR_MASK) + hw_err_src_reg & HCLGE_RAS_REG_ERR_MASK) return HCLGE_VECTOR0_EVENT_ERR; /* check for vector0 mailbox(=CMDQ RX) event source */ |