diff options
| author |   Shiju Jose <shiju.jose@huawei.com> | 2018-10-19 20:15:32 +0100 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2018-10-22 19:31:14 -0700 |
| commit | 01865a50d78f515423422b8c55e8b6f6bf4c2cd4 (patch) | |
| tree | 56ab75dc4b1007beae67d3f0f650504c1407d7ce /drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | |
| parent | net: hns3: Add enable and process hw errors from PPP (diff) | |
| download | linux-dev-01865a50d78f515423422b8c55e8b6f6bf4c2cd4.tar.xz linux-dev-01865a50d78f515423422b8c55e8b6f6bf4c2cd4.zip | |
net: hns3: Add enable and process hw errors of TM scheduler
This patch enables and process hw errors of TM scheduler and
QCN(Quantized Congestion Control).
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 082ea9749a54..5234b5373ed3 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -6881,6 +6881,12 @@ static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev) return ret; } + /* Re-enable the TM hw error interrupts because + * they get disabled on core/global reset. + */ + if (hclge_enable_tm_hw_error(hdev, true)) + dev_err(&pdev->dev, "failed to enable TM hw error interrupts\n"); + dev_info(&pdev->dev, "Reset done, %s driver initialization finished.\n", HCLGE_DRIVER_NAME); |