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| author |   Ivan Mikhaylov <ivan@de.ibm.com> | 2018-01-24 15:53:25 +0300 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2018-01-24 18:10:57 -0500 |
| commit | 624ca9c33c8a853a4a589836e310d776620f4ab9 (patch) | |
| tree | e5e708d84c307db6797cce2b8ca864e0c265088f /drivers/net/ethernet/ibm/emac | |
| parent | net/ibm/emac: add 8192 rx/tx fifo size (diff) | |
| download | linux-dev-624ca9c33c8a853a4a589836e310d776620f4ab9.tar.xz linux-dev-624ca9c33c8a853a4a589836e310d776620f4ab9.zip | |
net/ibm/emac: wrong bit is used for STA control register write
STA control register has areas of mode and opcodes for opeations. 18 bit is
using for mode selection, where 0 is old MIO/MDIO access method and 1 is
indirect access mode. 19-20 bits are using for setting up read/write
operation(STA opcodes). In current state 'read' is set into old MIO/MDIO mode
with 19 bit and write operation is set into 18 bit which is mode selection,
not a write operation. To correlate write with read we set it into 20 bit.
All those bit operations are MSB 0 based.
Signed-off-by: Ivan Mikhaylov <ivan@de.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/ibm/emac')
| -rw-r--r-- | drivers/net/ethernet/ibm/emac/emac.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/ibm/emac/emac.h b/drivers/net/ethernet/ibm/emac/emac.h index d0a0e3b3f283..c26d2631ca30 100644 --- a/drivers/net/ethernet/ibm/emac/emac.h +++ b/drivers/net/ethernet/ibm/emac/emac.h @@ -244,7 +244,7 @@ struct emac_regs { #define EMAC_STACR_PHYE 0x00004000 #define EMAC_STACR_STAC_MASK 0x00003000 #define EMAC_STACR_STAC_READ 0x00001000 -#define EMAC_STACR_STAC_WRITE 0x00002000 +#define EMAC_STACR_STAC_WRITE 0x00000800 #define EMAC_STACR_OPBC_MASK 0x00000C00 #define EMAC_STACR_OPBC_50 0x00000000 #define EMAC_STACR_OPBC_66 0x00000400 |