diff options
| author |   Anirudh Venkataramanan <anirudh.venkataramanan@intel.com> | 2018-03-20 07:58:06 -0700 |
|---|---|---|
| committer |   Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2018-03-26 09:44:56 -0700 |
| commit | 7ec59eeac804a59ea6fff81e89b6e584e9955e5b (patch) | |
| tree | 99270c779504e2b3f3ac9029099b6ff74f2bf171 /drivers/net/ethernet/intel/ice/ice_type.h | |
| parent | ice: Add basic driver framework for Intel(R) E800 Series (diff) | |
| download | linux-dev-7ec59eeac804a59ea6fff81e89b6e584e9955e5b.tar.xz linux-dev-7ec59eeac804a59ea6fff81e89b6e584e9955e5b.zip | |
ice: Add support for control queues
A control queue is a hardware interface which is used by the driver
to interact with other subsystems (like firmware, PHY, etc.). It is
implemented as a producer-consumer ring. More specifically, an
"admin queue" is a type of control queue used to interact with the
firmware.
This patch introduces data structures and functions to initialize
and teardown control/admin queues. Once the admin queue is initialized,
the driver uses it to get the firmware version.
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Tested-by: Tony Brelinski <tonyx.brelinski@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ethernet/intel/ice/ice_type.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h index cd018f81b5c7..212ab6cc0a42 100644 --- a/drivers/net/ethernet/intel/ice/ice_type.h +++ b/drivers/net/ethernet/intel/ice/ice_type.h @@ -4,6 +4,15 @@ #ifndef _ICE_TYPE_H_ #define _ICE_TYPE_H_ +#include "ice_status.h" +#include "ice_hw_autogen.h" +#include "ice_osdep.h" +#include "ice_controlq.h" + +/* debug masks - set these bits in hw->debug_mask to control output */ +#define ICE_DBG_AQ_MSG BIT_ULL(24) +#define ICE_DBG_AQ_CMD BIT_ULL(27) + /* Bus parameters */ struct ice_bus_info { u16 device; @@ -14,6 +23,7 @@ struct ice_bus_info { struct ice_hw { u8 __iomem *hw_addr; void *back; + u64 debug_mask; /* bitmap for debug mask */ /* pci info */ u16 device_id; @@ -23,6 +33,18 @@ struct ice_hw { u8 revision_id; struct ice_bus_info bus; + /* Control Queue info */ + struct ice_ctl_q_info adminq; + + u8 api_branch; /* API branch version */ + u8 api_maj_ver; /* API major version */ + u8 api_min_ver; /* API minor version */ + u8 api_patch; /* API patch version */ + u8 fw_branch; /* firmware branch version */ + u8 fw_maj_ver; /* firmware major version */ + u8 fw_min_ver; /* firmware minor version */ + u8 fw_patch; /* firmware patch version */ + u32 fw_build; /* firmware build number */ }; #endif /* _ICE_TYPE_H_ */ |