diff options
| author |   Anirudh Venkataramanan <anirudh.venkataramanan@intel.com> | 2018-03-20 07:58:13 -0700 |
|---|---|---|
| committer |   Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2018-03-26 11:18:36 -0700 |
| commit | cdedef59deb020e78721d820a5692100128c8c73 (patch) | |
| tree | 2bdeeb20d1fadea63eb26501b64bc6eee455f6e8 /drivers/net/ethernet/intel/ice/ice_type.h | |
| parent | ice: Add support for switch filter programming (diff) | |
| download | linux-dev-cdedef59deb020e78721d820a5692100128c8c73.tar.xz linux-dev-cdedef59deb020e78721d820a5692100128c8c73.zip | |
ice: Configure VSIs for Tx/Rx
This patch configures the VSIs to be able to send and receive
packets by doing the following:
1) Initialize flexible parser to extract and include certain
fields in the Rx descriptor.
2) Add Tx queues by programming the Tx queue context (implemented in
ice_vsi_cfg_txqs). Note that adding the queues also enables (starts)
the queues.
3) Add Rx queues by programming Rx queue context (implemented in
ice_vsi_cfg_rxqs). Note that this only adds queues but doesn't start
them. The rings will be started by calling ice_vsi_start_rx_rings on
interface up.
4) Configure interrupts for VSI queues.
5) Implement ice_open and ice_stop.
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Tested-by: Tony Brelinski <tonyx.brelinski@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ethernet/intel/ice/ice_type.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h index 8926715b76ee..991ac56ca7b3 100644 --- a/drivers/net/ethernet/intel/ice/ice_type.h +++ b/drivers/net/ethernet/intel/ice/ice_type.h @@ -8,9 +8,11 @@ #include "ice_hw_autogen.h" #include "ice_osdep.h" #include "ice_controlq.h" +#include "ice_lan_tx_rx.h" /* debug masks - set these bits in hw->debug_mask to control output */ #define ICE_DBG_INIT BIT_ULL(1) +#define ICE_DBG_QCTX BIT_ULL(6) #define ICE_DBG_NVM BIT_ULL(7) #define ICE_DBG_LAN BIT_ULL(8) #define ICE_DBG_SW BIT_ULL(13) |