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authorAaron Sierra <asierra@xes-inc.com>2015-11-03 12:37:09 -0600
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2015-12-14 10:20:06 -0800
commit2a3cdead8b408351fa1e3079b220fa331480ffbc (patch)
treeb6ef93bdee57969be848de5c81f6331588c572e0 /drivers/net/ethernet/intel/igb/e1000_i210.c
parente1000e: Switch e1000e_up to void, drop code checking for error result (diff)
downloadlinux-dev-2a3cdead8b408351fa1e3079b220fa331480ffbc.tar.xz
linux-dev-2a3cdead8b408351fa1e3079b220fa331480ffbc.zip
igb: Remove GS40G specific defines/functions
The I210 internal PHY can be accessed just as well with the access functions shared by 82580, I350, and I354 devices. A side effect of relying on the common functions, is that I210 cable length support is folded back into the common case which effectively reverts the following commit: commit 59f301046b276f87483b3afa3201a4273def06a9 Author: Carolyn Wyborny <carolyn.wyborny@intel.com> Date: Wed Oct 10 04:42:59 2012 +0000 igb: Update get cable length function for i210/i211 Cc: Carolyn Wyborny <carolyn.wyborny@intel.com> Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/igb/e1000_i210.c')
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_i210.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/net/ethernet/intel/igb/e1000_i210.c b/drivers/net/ethernet/intel/igb/e1000_i210.c
index 29f59c76878a..8aa798737d4d 100644
--- a/drivers/net/ethernet/intel/igb/e1000_i210.c
+++ b/drivers/net/ethernet/intel/igb/e1000_i210.c
@@ -861,10 +861,10 @@ s32 igb_pll_workaround_i210(struct e1000_hw *hw)
if (ret_val)
nvm_word = E1000_INVM_DEFAULT_AL;
tmp_nvm = nvm_word | E1000_INVM_PLL_WO_VAL;
+ igb_write_phy_reg_82580(hw, I347AT4_PAGE_SELECT, E1000_PHY_PLL_FREQ_PAGE);
for (i = 0; i < E1000_MAX_PLL_TRIES; i++) {
/* check current state directly from internal PHY */
- igb_read_phy_reg_gs40g(hw, (E1000_PHY_PLL_FREQ_PAGE |
- E1000_PHY_PLL_FREQ_REG), &phy_word);
+ igb_read_phy_reg_82580(hw, E1000_PHY_PLL_FREQ_REG, &phy_word);
if ((phy_word & E1000_PHY_PLL_UNCONF)
!= E1000_PHY_PLL_UNCONF) {
ret_val = 0;
@@ -896,6 +896,7 @@ s32 igb_pll_workaround_i210(struct e1000_hw *hw)
/* restore WUC register */
wr32(E1000_WUC, wuc);
}
+ igb_write_phy_reg_82580(hw, I347AT4_PAGE_SELECT, 0);
/* restore MDICNFG setting */
wr32(E1000_MDICNFG, mdicnfg);
return ret_val;