path: root/drivers/net/ethernet/intel/igb/e1000_regs.h
diff options
authorTodd Fujinaka <todd.fujinaka@intel.com>2015-09-18 15:43:51 -0700
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2015-12-12 23:10:05 -0800
commit08c991297582114a6e1220f913eec91789c4eac6 (patch)
tree38ae1d4185d91848e43b6f3144074c199a511c1d /drivers/net/ethernet/intel/igb/e1000_regs.h
parente1000: Remove checkpatch coding style errors (diff)
igb: use the correct i210 register for EEMNGCTL
The i210 has two EEPROM access registers that are located in non-standard offsets: EEARBC and EEMNGCTL. EEARBC was fixed previously and EEMNGCTL should also be corrected. Reported-by: Roman Hodek <roman.aud@siemens.com> Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/igb/e1000_regs.h')
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/igb/e1000_regs.h b/drivers/net/ethernet/intel/igb/e1000_regs.h
index 4af2870e49f8..0fdcd4d1b982 100644
--- a/drivers/net/ethernet/intel/igb/e1000_regs.h
+++ b/drivers/net/ethernet/intel/igb/e1000_regs.h
@@ -66,6 +66,7 @@
#define E1000_PBA 0x01000 /* Packet Buffer Allocation - RW */
#define E1000_PBS 0x01008 /* Packet Buffer Size */
#define E1000_EEMNGCTL 0x01010 /* MNG EEprom Control */
+#define E1000_EEMNGCTL_I210 0x12030 /* MNG EEprom Control */
#define E1000_EEARBC_I210 0x12024 /* EEPROM Auto Read Bus Control */
#define E1000_EEWR 0x0102C /* EEPROM Write Register - RW */
#define E1000_I2CCMD 0x01028 /* SFPI2C Command Register - RW */